John Cockerill, enablers of opportunitiesDriven since 1817 by the entrepreneurial spirit and thirst for innovation of its founder, the John Cockerill Group develops large-scale technological solutions to meet the needs of its time: facilitating access to low carbon energies, enabling sustainable industrial production, preserving natural resources, contributing to greener mobility, enhancing security and installing essential infrastructures.Its offer to businesses, governments and communities consists of services and associated equipment for the sectors of energy, defence, industry, the environment, transports, and infrastructures. With more than 8,000 employees, John Cockerill achieved a turnover of € 1.417 billion in 2024 in 28 countries, on 5 continents.John Cockerill has been providing its expertise to the defense industry for 200 years. Today, John Cockerill Defense offers Cockerill® modular gun turrets from 25 to 120 mm caliber, Arquus® high-mobility vehicles, technical and tactical training on these systems, and Agueris simulators.Your Mission:The goal of this internship is to develop a proof-of-concept of a multiple CAN Bus bridge based on a Xilinx FPGA technology (e.g. zynq ultrascale+). The system should interface up to 8 CAN Bus, with configurable speed and configurable protocol through a single CAN line. The proof-of-concept shall be developed on a Xilinx development board.1. Define the needsYou will start by understanding the CAN Bus protocol, then the architecture and the integration of IPs in a Xilinx FPGA.2. Conceptual designYou will do some research on existing IP.You will define and evaluate the development boards and FPGA needs.3. Create the prototype FPGA bitstreamYou will design a customized FPGA bitstream integrating a configurable CAN Bridge. You will validate the communication using simulation testing tools (VHDL and/or UVM testbench) .4. HW testsYou will test the CAN bridge on a development board and validate the functions and the stability of the solution. Once the bridge concept is validated, you will develop a penta-CAN bus version and a octoCAN bus version.Subject discussed:
CAN Bus, JTAG, Quad-SPI
Xilinx FPGA
Vivado development tools
VHDL
Simulation testbench
Your Profile:
Student in a master's degree education level in electronic
Minimum level B2 in French and English
Available for at least of 2-3 months
Your Internal Support:During this internship, you will be supported by the electronic R&D department and the electronic industrialization and prototyping department of John Cockerill Defense. The internal supervisors will be:
Matthieu Close (R&D engineer) - project definition
Maxime Javaux (R&D engineer) - project definition
Quentin Gaspart (R&D engineer) - FPGA design
What we offer you:
Immersion in a stimulating, technology-driven environment
Concrete and rewarding responsibilities
A caring and passionate team
We look forward to receiving your application and meeting you.Discover our job opportunities in details on
